The present invention relates to a signal measurement apparatus being able to detect a desired logic combination of logic input signals.
Recently, logic technique is gaining popularity in the measurement field of digital analog signals. Logic signal measurement apparatus such as logic analyzers are suitable for adjustment and troubleshooting of the digital instruments such as, for example, computers, electronic calculators, computer terminals and digital control systems. Such logic analyzers are frequently required to measure logic level (High or Low) and timing relationship of a plurality of logic signals on a data bus, an address bus or various circuit points, because the logic analyzers can measure the plurality of logic signals prior to a trigger signal and can generate the trigger signal when the combination of the logic signals matches with a desired logic pattern. This trigger mode is called "combination trigger" or "word trigger", and the circuit for this trigger mode is called "word recognizer".
A conventional word recognizer circuit is included in a signal measurement apparatus such as the logic analyzer, and consists of a plurality of logic gates and switches for setting the desired logic pattern. Each of the logic gates receives a logic signal to be measured and the desired logic level from the switch for comparing them. The outputs from the plurality of logic gates are applied to an AND (or NAND) gate so that it generates a trigger pulse when the combination of the input logic signals corresponds to the desired logic pattern set by the switches.
An operator may want to obtain the combination trigger of the logic signals in excess of the number of the input terminals of the signal measurement apparatus. For example, it may be desired to measure logic signals on the data bus; however, the logic signals on both the data bus and the address bus are to be applied to the word recognizer. In the conventional signal measurement apparatus, however, a qualifier or auxiliary input is required to provide a number of input terminals of the word recognizer equal to the number of input terminals of the signal measurement apparatus. Thus, the conventional signal measurement apparatus cannot be readily utilized in situations in which signals outnumber input terminals. For realizing this purpose, additional logic gates, switches and input terminals for the word recognizer may be provided in the signal measurement apparatus. This results in increased use of panel space, increased instrument size, and an unnecessary expense for users who do not desire the additional inputs of the word recognizer.
It is, therefore, an object of the present invention to provide an improved signal measurement apparatus which can detect a desired logic combination of more logic signals than the number of input terminals of the apparatus without increasing the space of the apparatus.
It is another object of the present invention to provide a compact signal measurement apparatus including a word recognizer which can increase the number of logic signals for the combination trigger without increasing the space of the signal measurement apparatus.
It is an additional object of the present invention to provide an improved signal measurement apparatus consisting of a main-frame and a sub-frame for increasing the number of logic signals for the combination trigger.
Other objects and attainments of the present invention will become apparent to those skilled in the art upon a reading of the following detailed description when taken in conjunction with the drawings.